The invention relates to a method for processing in a data processor input address words of M+N bits each for generating destination addresses for an addressable structure.
It also relates to a device for processing address words utilizing thus method. Such a device may be realized as a computer, microprocessor, data management unit, storage device or other device, which apart from any other functional element that could benefit from the realization of the invention, could have elements for embodying the invention, to generate destination addresses for therewith accessing an addressable structure. The destination address location may be dedicated to storing data, further addresses, instructions, or other data.